Click a paper to view its questions. The specification for the course is shown on the right. For each question, its specification references are listed and can be clicked to scroll the relevant part of the specification into view.
Only A-Level questions relating to the AS-Level specification are shown.
A sound is sampled and recorded digitally. The sound is sampled at a rate of 48 000 samples per second (Hz) for 3 minutes using a 16-bit sample resolution.
Calculate the size of the digital recording, giving your answer in mebibytes.
Give your answer rounded to 2 decimal places.
You should show your working.
Award 2 marks for correct answer: 16.48
Acceptable responses: written correctly to more decimal places (16.4794921875) or as a fraction 16 491/1024
Acceptable: 48000 × 16 × 3 × 60 / 8 / 1024 / 1024
Award 1 mark for an answer written to 0 or 1 decimal places (16 or 16.5) or if truncated to 16.47
If answer is incorrect then award 1 method mark for doing at least three of:
- multiplying by 48000
- multiplying by 16
- multiplying by 3
- multiplying by 60
- dividing by 8
- dividing by 1024 / 210
- dividing by 1024 / 210 a second time
The following method points are equivalent to performing two of the method points in the list above:
- multiplying by 180
- dividing by 2
- dividing by 1048576 / 220
Max 1 if answer is not correct and written to at least 2 decimal places
The highest frequency component in a different sound is 15 000 Hz.
What is the minimum sampling rate that should be used when recording this sound to ensure that all the frequencies in the original waveform are preserved, so that when the recording is played back the original sound is recreated accurately?
Award 1 mark for correct answer: 30000
Acceptable: 15000 × 2, double 15000
Figure 1 shows part of the process of playing back a sound that has been sampled. The binary sound data is used to generate an electrical waveform.
A hardware component on a sound card carries out the process shown in Figure 1.
State the name of this component.
Digital to Analogue Converter
Acceptable: DAC
Not enough: Digital to Analogue
Reject: Initialism and full name both given but do not match eg Digital to Analogue Converter (ADC)
Reject: If two components named
Encrypt the plaintext SECURITY using the Caesar cipher with a key of 4.
| Plaintext | Ciphertext |
| SECURITY |
WIGYVMXC;
Ignore: case
State one weakness that both the Caesar cipher and the cipher shown in Figure 3 have which means they can be easily cracked.
Each letter/character is always encrypted to the same letter/character;
The letters/characters in the ciphertext will have the same frequency as their corresponding letters/characters in the plaintext (allowing the correspondence to be worked out given enough ciphertext);
Acceptable: The ciphertext is susceptible to frequency analysis
Not enough: Patterns in the text can be identified
The ciphertext will retain structural properties of the plaintext message;
Acceptable: Examples of structural properties, eg some letters frequently occur next to each other, some letters rarely appear next to each other, position of spaces can identify word lengths, common short words can be identified
Reject: Susceptible to brute-force cracking techniques
State one reason why the cipher in Figure 3 is harder to crack than the Caesar cipher.
There are more (possible) keys;
It is not possible to work out how other letters/characters have been encrypted directly from the knowledge of how one letter/character has been encrypted;
There is no pattern to the letter replacements;
Acceptable: Letter replacements are not in alphabetical order
Acceptable: Letter replacements in the cipher are random
Acceptable: It is not the case that every letter has the same shift
Acceptable: (Some) letters are shifted by different (Acceptable: random) amounts
Not enough: Letters are encrypted randomly
Reject: Each letter has a random key
Note: "Random" must clearly relate to the letter replacement to award a mark
The Vernam cipher, unlike the Caesar cipher, can be perfectly secure.
State two conditions that must be met for the Vernam cipher to offer perfect security.
The key must be (at least) as long as the data to be encrypted/plaintext;
The key must not be reused // key must only be used once; Not enough: one time pad
The key must be (truly) random;
The key must be kept securely/not revealed/only known by user(s);
Acceptable: The key must be destroyed after use as an alternative to the second or fourth mark points
Describe how the fetch-execute cycle is used to carry out machine code instructions and how the hardware of a computer could be improved so that programs can be executed more quickly.
Your response should include a description of what happens during each stage of the fetch-execute cycle.
Level Descriptors
| Level | Description | Mark Range |
|---|---|---|
| 4 | A line of reasoning has been followed to produce a coherent, relevant, substantiated and logically-structured response. The response covers both areas indicated in the guidance below and, in each area, there is sufficient detail to show that the student has a good level of understanding. | 10–12 |
| 3 | A line of reasoning has been followed to produce a coherent, relevant, substantiated and logically structured response which shows a good level of understanding of at least one area indicated in the guidance below and some understanding of the other area. | 7–9 |
| 2 | A limited attempt has been made to follow a line of reasoning and the response has a mostly logical structure. A good level of understanding has been shown of one area or some understanding of both areas. | 4–6 |
| 1 | A few relevant points have been made but there is no evidence that a line of reasoning has been followed. There is insufficient evidence of a good level of understanding of either of the two areas. | 1–3 |
Indicative Content
Area 1: Fetch-Execute Cycle
F-E Stage 1 Fetch:
- Contents of Program Counter/PC transferred to Memory Address Register/MAR
- Reject: If implied the instruction is stored in the PC
- Address bus used to transfer this address to main memory
- Read signal sent along control bus
- Transfer of main memory content uses the data bus
- Contents of addressed memory location loaded into the Memory Buffer Register/MBR
- Increment (contents of) Program Counter/PC Acceptable: At any part of fetch process after transferring PC to MAR
- Increment Program Counter/PC and fetch instruction simultaneously
- Contents of MBR copied to CIR
F-E Stage 2 Decode:
- Instruction to decode held by the (Current) Instruction Register/(C)IR
- The control unit decodes the instruction
- Instruction split into opcode and operand(s)
F-E Stage 3 Execute:
- If necessary, data is fetched/stored
- The opcode identifies the type of operation/instruction to be performed (by the processor)
- The operation (identified by the opcode) is performed by the control unit.
- ALU used for calculation/comparisons
- Result (may be) stored in register/main memory Acceptable: accumulator
- Status register updated
- If jump/branch required Program Counter/PC is updated
- Control bus will transfer signals to other components to initiate/sequence actions
A good level of understanding would be demonstrated by a response that effectively covered all three stages of the cycle and did not focus excessively on one particular stage. There may be omissions, but these would not be of any key points. Any errors made would be minor.
Area 2: Improving Hardware
- Replace the processor with one which has more cores Acceptable: Increase number of cores
- Replace the processor with one which has more cache memory // increase the amount of cache memory // add cache memory
- Increase clock speed of processor // replace the processor with one which runs at a faster clock speed Not enough: faster processor
- Use a parallel processor architecture // use more processors which can work in parallel
- Use a processor with a bigger word size
- Use a processor that makes (better) use of pipelining
- Install more RAM // main memory // primary memory
- Use RAM // main memory // primary memory with a faster access time
- Replace the motherboard with one which has buses which run at a faster clock speed Acceptable: increase bus clock speed
- Replace the motherboard with one which has more lines in data bus Acceptable: increase number of lines in data bus
- Acceptable: Replace HDDs with SSDs // replace HDDS with HDDs that can read data at a faster rate // replace SSDS with SSDs that can read data at a faster rate
- Acceptable: Use the Harvard architecture instead of the von Neumann architecture
A good level of understanding would be demonstrated by a response that covered a range of hardware improvements that could be made (eg to the processor, buses, main memory) and did not focus excessively on only one component. Explanations of how a change would improve performance could be taken into account when considering how good the understanding is.
In binary, show the result of applying the instruction AND R0, R1, #15 when register R1 contains the decimal value 70 which is 46 in hexadecimal.
R1 0 1 0 0 0 1 1 0
15 0 0 0 0 1 1 1 1
R0
Award 1 mark for correct value in R0:
| R1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 |
| 15 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
| R0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
Reject: Any cells of R0 left empty
In binary, show the result of applying the instruction ORR R0, R1, #48 when register R1 contains the decimal value 6 which is 6 in hexadecimal.
R1 0 0 0 0 0 1 1 0
48 0 0 1 1 0 0 0 0
R0
Award 1 mark for correct value in R0:
| R1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
| 48 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 |
| R0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 |
Reject: Any cells of R0 left empty
A computer program is required to display the value of the contents of a memory location that stores an 8-bit value. The value should be displayed on the screen of the computer in hexadecimal.
Part of the process required to do this is to convert the value stored in the memory location into the correct ASCII codes for each of the two digits that represent that value in hexadecimal.
Write an assembly language program using the AQA assembly language instruction set that will load a value from memory location 100 and store the ASCII code of the first (lefthand) digit of the hexadecimal representation of this value in memory location 101 and the ASCII code of the second (righthand) digit of the hexadecimal representation of this value in memory location 102.
Your program should use masking and/or shifting to complete this task.
The ASCII codes of the hexadecimal digits are shown in Table 2 and the AQA assembly language instruction set is in Table 3 on page 23.
6 marks (programming syntax must be correct):
- MP1: Value in memory location 100 is loaded into a register;
- MP2: After some manipulation has been carried out (whether correct or not) values are stored into memory locations 101 and 102 (do not award if it is the same value stored twice);
- MP3: Binary pattern of one digit correctly isolated from the input value (for leftmost digit must also be shifted so bits in correct place);
- MP4: Binary pattern of one digit correctly translated into ASCII for one of numeric digits or letter digits (ignore if the pattern is later changed again to be incorrect);
- MP5: Binary pattern of one digit correctly translated into ASCII for both numeric digits and letter digits (ignore if the pattern is later changed again to be incorrect);
- MP6: Conversion process fully working for the both digits (ASCII codes must be correct when program terminates);
Note: If MP3 not awarded MP4, MP5, MP6 cannot be awarded
Acceptable: Any understandable method for identifying labels
DPT. Use of invalid register names eg R27, Rn
DPT. Use of binary for immediate operand values
DPT. Omission of # to indicate immediate operand values
DPT. R before memory address eg R100
DPT. Use of MOV instead of LDR or STR, or vice-versa
DPT. Repeated use of incorrect delimiters eg ; < > . " ' (occasional errors can be ignored)
4 marks (concept must be understood, syntax need not be correct):
- MP7: Attempt to use masking and/or shifting to identify one digit;
- MP8: Attempt to use masking and/or shifting a second time to identify the second digit;
- MP9: Attempt to use comparison and branching to make program treat numeric digits and letter digits differently for at least one of the two digits (whether threshold values correct or not);
- MP10: Use of addition or masking to attempt to convert a digit to an ASCII code (whether correct ASCII codes produced or not);
Note: If MP3 not awarded MP10 cannot be awarded
Max 9 if solution not fully working
In the space below, draw a logic circuit that would produce the outputs shown in Table 4 for the given inputs. To achieve full marks for your response, your circuit should use exactly two gates.
| Inputs | Outputs | ||
|---|---|---|---|
| A | B | C | D |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
1 mark: Output C is correct for all inputs
1 mark: Output D is correct for all inputs
1 mark: Circuit is fully correct and uses exactly two gates
Using the rules of Boolean algebra, simplify the following Boolean expression. You must show your working.
A.B' + B.(A'+(B'.C))'
Marking guidance for examiners
- Award marks for working out until an incorrect step has been made.
- Ignore missing steps from the example solutions, as long as the jumps between steps are logically correct.
- If, in any one step, a candidate is simplifying different parts of an expression simultaneously and makes an error, award marks for the correctly simplified part(s) and then stop marking.
1 mark for final answer: A
3 marks for working. Award up to three marks for applying each one of the three techniques (one mark per application, multiple marks can be awarded for using the same technique more than once):
- a successful application of De Morgan's Law (and any associated cancellation of NOTs) that produces a simpler expression – award 2 marks if De Morgan's Law applied twice simultaneously
- applying an identity other than cancelling NOTs that produces a simpler expression
- successfully expanding brackets // factorising.
Note: A simpler expression is one that is logically equivalent to the original expression but uses fewer logical operators.
Max 2 for working if there is no successful application of De Morgan.
Max 3 overall if any incorrect working
A data communication system uses asynchronous data transmission with even parity to send character codes that are encoded using 7-bit ASCII.
Figure 9 shows five binary patterns.
Pattern 1: 1 0 1 1 1 0 1 1 0 1
Pattern 2: 1 1 0 1 1 1 1 0 0 0
Pattern 3: 0 1 0 0 0 0 1 1 1 0
Pattern 4: 1 0 1 1 1 1 0 0 0 0
Pattern 5: 1 1 0 0 0 0 0 1 0 0
How many of the binary patterns in Figure 9 could represent valid transmissions of a single character in this data communication system?
2;
Acceptable: Number not stated but identified that 4 and 5 are the valid patterns
Ignore: Incorrect patterns stated if correct answer 2 given
An alternative data communication system uses synchronous data transmission.
Describe what synchronous data transmission is.
Receiver and transmitter (continuously) synchronised by a common clock // timing information transmitted within/alongside the data // receiver and transmitter clocks are (continuously) synchronised;
Acceptable: Both devices synchronised by same clock
Not enough: Receiver and transmitter are synchronised
Not enough: Transmission synchronised to a clock signal
Describe one limitation of the use of parity bits for managing errors.
Errors that change an even number of bits (Acceptable: two bits) cannot be detected;
Reject: multi-bit errors cannot be identified
(Errors can be detected but) errors cannot be corrected;
Acceptable: Position of errors cannot be identified
Shade one lozenge to indicate which of the lines on the graph in Figure 10 shows the correct relationship between the bandwidth and the bit rate of a communications medium.
- A:Line A
- B:Line B
- C:Line C
- D:Line D
A; (Line A)
Reject: If more than one lozenge shaded
Paper 2 covers sections 5-9 of the AQA AS Computer Science specification.
5 Fundamentals of data representation
5.1 Number systems
5.1.1 Natural numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.1.1 View | Be familiar with the concept of a natural number and the set ℕ of natural numbers (including zero). | ℕ = {0, 1, 2, 3, …} |
5.1.2 Integer numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.2.1 View | Be familiar with the concept of an integer and the set ℤ of integers. | ℤ = { …, -3, -2, -1, 0, 1, 2, 3, … } |
5.1.3 Rational numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.3.1 View | Be familiar with the concept of a rational number and the set ℚ of rational numbers, and that this set includes the integers. | ℚ is the set of numbers that can be written as fractions (ratios of integers). Since a number such as 7 can be written as 7/1, all integers are rational numbers. |
5.1.4 Irrational numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.4.1 View | Be familiar with the concept of an irrational number. | An irrational number is one that cannot be written as a fraction, for example √2. |
5.1.5 Real numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.5.1 View | Be familiar with the concept of a real number and the set ℝ of real numbers, which includes the natural numbers, the rational numbers, and the irrational numbers. | ℝ is the set of all 'possible real world quantities'. |
5.1.6 Ordinal numbers
| Reference | Content | Additional information |
|---|---|---|
| 5.1.6.1 View | Be familiar with the concept of ordinal numbers and their use to describe the numerical positions of objects. | When objects are placed in order, ordinal numbers are used to tell their position. For example, if we have a well-ordered set S = {'a', 'b', 'c', 'd'}, then 'a' is the 1st object, 'b' the 2nd, and so on. |
5.1.7 Counting and measurement
| Reference | Content | Additional information |
|---|---|---|
| 5.1.7.1 View | Be familiar with the use of natural numbers for counting. | |
| 5.1.7.2 View | Be familiar with the use of real numbers for measurement. |
5.2 Number bases
5.2.1 Number base
| Reference | Content | Additional information |
|---|---|---|
| 5.2.1.1 View | Be familiar with the concept of a number base, in particular:
| Students should be familiar with expressing a number's base using a subscript as follows:
|
| 5.2.1.2 View | Convert between decimal, binary and hexadecimal number bases. | |
| 5.2.1.3 View | Be familiar with, and able to use, hexadecimal as a shorthand for binary and to understand why it is used in this way. |
5.3 Units of information
5.3.1 Bits and bytes
| Reference | Content | Additional information |
|---|---|---|
| 5.3.1.1 View | Know that the bit is the fundamental unit of information. | A bit is either 0 or 1. |
| 5.3.1.2 View | Know that a byte is a group of 8 bits. | |
| 5.3.1.3 View | Know that 2n different values can be represented with n bits. | For example, 3 bits can be configured in 23 = 8 different ways: 000, 001, 010, 011, 100, 101, 110, 111. |
5.3.2 Units
| Reference | Content | Additional information |
|---|---|---|
| 5.3.2.1 View | Know the names, symbols and corresponding powers of 10 for the decimal prefixes:
| |
| 5.3.2.2 View | Know the names, symbols and corresponding powers of 2 for the binary prefixes:
| |
| 5.3.2.3 View | Know that quantities of bytes can be described using binary prefixes representing powers of 2 or using decimal prefixes representing powers of 10, eg one kibibyte is written as 1KiB = 210 B and one kilobyte is written as 1 kB = 103 B. | Historically the terms kilobyte, megabyte, etc have often been used when kibibyte, mebibyte, etc are meant. |
5.4 Binary number system
5.4.1 Unsigned binary
| Reference | Content | Additional information |
|---|---|---|
| 5.4.1.1 View | Know the difference between unsigned binary and signed binary. | Students are expected to be able to convert between unsigned binary and decimal and vice versa. |
| 5.4.1.2 View | Know that in unsigned binary the minimum and maximum values for a given number of bits, n, are 0 and 2n - 1 respectively. |
5.4.2 Unsigned binary arithmetic
| Reference | Content | Additional information |
|---|---|---|
| 5.4.2.1 View | Be able to add two unsigned binary integers. | |
| 5.4.2.2 View | Be able to multiply two unsigned binary integers. |
5.4.3 Signed binary using two's complement
| Reference | Content | Additional information |
|---|---|---|
| 5.4.3.1 View | Know that signed binary can be used to represent negative integers and that one possible coding scheme is two's complement. | This is the only representation of negative integers that will be examined. Students are expected to be able to convert between signed binary and decimal and vice versa. |
| 5.4.3.2 View | Know how to represent negative and positive integers in two's complement. | |
| 5.4.3.3 View | Know how to perform subtraction using two's complement. | |
| 5.4.3.4 View | Know how to calculate the range of a given number of bits, n. |
5.4.4 Numbers with a fractional part
| Reference | Content | Additional information |
|---|---|---|
| 5.4.4.1 View | Know how numbers with a fractional part can be represented in fixed point form in binary in a given number of bits. | |
| 5.4.4.2 View | Be able to convert decimal to fixed point binary of a given number of bits. | |
| 5.4.4.3 View | Be able to convert fixed point binary to decimal of a given number of bits. |
5.5 Information coding systems
5.5.1 Character form of a decimal digit
| Reference | Content | Additional information |
|---|---|---|
| 5.5.1.1 View | Differentiate between the character code representation of a decimal digit and its pure binary representation. |
5.5.2 ASCII and Unicode
| Reference | Content | Additional information |
|---|---|---|
| 5.5.2.1 View | Describe ASCII and Unicode coding systems for coding character data. | |
| 5.5.2.2 View | Explain why Unicode was introduced. |
5.5.3 Error checking and correction
| Reference | Content | Additional information |
|---|---|---|
| 5.5.3.1 View | Describe and explain the use of parity bits. | |
| 5.5.3.2 View | Describe and explain the use of majority voting. | |
| 5.5.3.3 View | Describe and explain the use of check digits. | |
| 5.5.3.4 View | Evaluate the use of parity bits, majority voting and check digits |
5.6 Representing images, sound and other data
5.6.1 Bit patterns, images, sound and other data
| Reference | Content | Additional information |
|---|---|---|
| 5.6.1.1 View | Describe how bit patterns may represent other forms of data, including graphics and sound. |
5.6.2 Analogue and digital
| Reference | Content | Additional information |
|---|---|---|
| 5.6.2.1 View | Understand the difference between analogue and digital:
|
5.6.3 Analogue/digital conversion
| Reference | Content | Additional information |
|---|---|---|
| 5.6.3.1 View | Describe the principles of operation of an analogue to digital converter (ADC). | |
| 5.6.3.2 View | Describe the principles of operation of a digital to analogue converter (DAC). |
5.6.4 Bitmapped graphics
| Reference | Content | Additional information |
|---|---|---|
| 5.6.4.1 View | Explain how bitmaps are represented. | |
| 5.6.4.2 View | Explain resolution. | Resolution is expressed as number of dots per inch where a dot is a pixel. |
| 5.6.4.3 View | Know that colour depth is the number of bits stored for each pixel. | |
| 5.6.4.4 View | Know that the size of an image in pixels is width of image in pixels × height of image in pixels. | The size of an image is also alternatively sometimes described as the resolution of an image. |
| 5.6.4.5 View | Calculate storage requirements for bitmapped images and be aware that bitmap image files may also contain metadata. | Ignoring metadata, storage requirements = size in pixels x colour depth where size in pixels is width in pixels x height in pixels. |
| 5.6.4.6 View | Be familiar with typical metadata. | eg width, height, colour depth. |
5.6.5 Digital representation of sound
| Reference | Content | Additional information |
|---|---|---|
| 5.6.5.1 View | Describe the digital representation of sound. | |
| 5.6.5.2 View | Understand sample resolution and its effect on the quality of audio recordings. | |
| 5.6.5.3 View | Understand sampling rate and its effect on the quality of audio recordings. | |
| 5.6.5.4 View | Know Nyquist's theorem. | |
| 5.6.5.5 View | Calculate sound sample sizes in bytes. |
5.6.6 Musical Instrument Digital Interface (MIDI)
| Reference | Content | Additional information |
|---|---|---|
| 5.6.6.1 View | Describe the purpose of MIDI and the use of event messages in MIDI. | |
| 5.6.6.2 View | Describe the advantages of using MIDI files for representing music. |
5.6.7 Data compression
| Reference | Content | Additional information |
|---|---|---|
| 5.6.7.1 View | Know why images and sound files are often compressed and that other files, such as text files, can also be compressed. | |
| 5.6.7.2 View | Understand the difference between lossless and lossy compression and explain the advantages and disadvantages of each. | |
| 5.6.7.3 View | Explain the principles behind run length encoding (RLE) for lossless compression. | |
| 5.6.7.4 View | Explain the principles behind dictionary-based methods for lossless compression. |
5.6.8 Encryption
| Reference | Content | Additional information |
|---|---|---|
| 5.6.8.1 View | Understand what is meant by encryption and be able to define it. | Caesar and Vernam ciphers are at opposite extremes. One offers perfect security, the other doesn't. Between these two types are ciphers that are computationally secure – see below. Students will be assessed on the two types. Ciphers other than Caesar may be used to assess students' understanding of the principles involved. These will be explained and be similar in terms of computational complexity. |
| 5.6.8.2 View | Be familiar with the term cipher. | |
| 5.6.8.3 View | Be familiar with the term plaintext. | |
| 5.6.8.4 View | Be familiar with the term ciphertext. | |
| 5.6.8.5 View | Be familiar with Caesar cipher and be able to apply it to encrypt a plaintext message and decrypt a ciphertext. | |
| 5.6.8.6 View | Be able to explain why Caesar cipher is easily cracked. | |
| 5.6.8.7 View | Be familiar with Vernam cipher or one-time pad and be able to apply it to encrypt a plaintext message and decrypt a ciphertext. | Since the key k is chosen uniformly at random, the ciphertext c is also distributed uniformly. The key k must be used once only. The key k is known as a one-time pad. |
| 5.6.8.8 View | Explain why Vernam cipher is considered as a cypher with perfect security. | |
| 5.6.8.9 View | Compare Vernam cipher with ciphers that depend on computational security. | Vernam cipher is the only one to have been mathematically proved to be completely secure. The worth of all other ciphers ever devised is based on computational security. In theory, every cryptographic algorithm except for Vernam cipher can be broken, given enough ciphertext and time. |
6 Fundamentals of computer systems
6.1 Hardware and software
6.1.1 Relationship between hardware and software
| Reference | Content | Additional information |
|---|---|---|
| 6.1.1.1 View | Define the term hardware. | |
| 6.1.1.2 View | Define the term software. | |
| 6.1.1.3 View | Understand the relationship between hardware and software. |
6.1.2 Classification of software
| Reference | Content | Additional information |
|---|---|---|
| 6.1.2.1 View | Explain what is meant by system software. | |
| 6.1.2.2 View | Explain what is meant by application software. | |
| 6.1.2.3 View | Understand the need for, and attributes of, different types of software. |
6.1.3 System software
| Reference | Content | Additional information |
|---|---|---|
| 6.1.3.1 View | Know that system software includes operating systems (OSs), utility programs, libraries and translators (compiler, assembler, interpreter). | |
| 6.1.3.2 View | Understand the need for, and functions of operating systems (OSs). | |
| 6.1.3.3 View | Understand the need for, and functions of utility programs. | |
| 6.1.3.4 View | Understand the need for, and functions of libraries. | |
| 6.1.3.5 View | Understand the need for, and functions of translators (compiler, assembler, interpreter). |
6.1.4 Role of an operating system (OS)
| Reference | Content | Additional information |
|---|---|---|
| 6.1.4.1 View | Understand that a role of the operating system is to hide the complexities of the hardware. | |
| 6.1.4.2 View | Know that the OS handles resource management, managing hardware to allocate processors, memories and I/O devices among competing processes. |
6.2 Classification of programming languages
6.2.1 Classification of programming languages
| Reference | Content | Additional information |
|---|---|---|
| 6.2.1.1 View | Show awareness of the development of types of programming languages and their classification into low- and high-level languages. | |
| 6.2.1.2 View | Know that low-level languages are considered to be:
| |
| 6.2.1.3 View | Know that high-level languages include imperative high-level language. | |
| 6.2.1.4 View | Describe machine-code language and assembly language. | |
| 6.2.1.5 View | Understand the advantages and disadvantages of machine-code and assembly language programming compared with high-level language programming. | |
| 6.2.1.6 View | Explain the term 'imperative high-level language' and its relationship to low-level languages. |
6.3 Types of program translator
6.3.1 Types of program translator
| Reference | Content | Additional information |
|---|---|---|
| 6.3.1.1 View | Understand the role of assemblers. | |
| 6.3.1.2 View | Understand the role of compilers. | |
| 6.3.1.3 View | Understand the role of interpreters. | |
| 6.3.1.4 View | Explain the differences between compilation and interpretation. Describe situations in which each would be appropriate. | |
| 6.3.1.5 View | Explain why an intermediate language such as bytecode is produced as the final output by some compilers and how it is subsequently used. | |
| 6.3.1.6 View | Understand the difference between source and object (executable) code. |
6.4 Logic gates
6.4.1 Logic gates
| Reference | Content | Additional information |
|---|---|---|
| 6.4.1.1 View | Construct truth tables for the NOT logic gate. | Students should know and be able to use ANSI/IEEE standard 91-1984 Distinctive shape logic gate symbols for these logic gates. |
| 6.4.1.2 View | Construct truth tables for the AND logic gate. | |
| 6.4.1.3 View | Construct truth tables for the OR logic gate. | |
| 6.4.1.4 View | Construct truth tables for the XOR logic gate. | |
| 6.4.1.5 View | Construct truth tables for the NAND logic gate. | |
| 6.4.1.6 View | Construct truth tables for the NOR logic gate. | |
| 6.4.1.7 View | Be familiar with drawing and interpreting logic gate circuit diagrams involving one or more of the above gates. | |
| 6.4.1.8 View | Complete a truth table for a given logic gate circuit. | |
| 6.4.1.9 View | Write a Boolean expression for a given logic gate circuit. | |
| 6.4.1.10 View | Draw an equivalent logic gate circuit for a given Boolean expression. |
6.5 Boolean algebra
6.5.1 Using Boolean algebra
| Reference | Content | Additional information |
|---|---|---|
| 6.5.1.1 View | Be familiar with the use of Boolean identities and De Morgan's laws to manipulate and simplify Boolean expressions. |
7 Fundamentals of computer organisation and architecture
7.1 Internal hardware components of a computer
7.1.1 Internal hardware components of a computer
| Reference | Content | Additional information |
|---|---|---|
| 7.1.1.1 View | Have an understanding and knowledge of the basic internal components of a computer system. | Although exam questions about specific machines will not be asked, it might be useful to base this section on the machines used at the centre. |
| 7.1.1.2 View | Understand the role of the processor. | |
| 7.1.1.3 View | Understand the role of main memory. | |
| 7.1.1.4 View | Understand the role of the address bus. | |
| 7.1.1.5 View | Understand the role of the data bus. | |
| 7.1.1.6 View | Understand the role of the control bus. | |
| 7.1.1.7 View | Understand the role of I/O controllers. | |
| 7.1.1.8 View | Be able to explain the difference between von Neumann and Harvard architectures and describe where each is typically used. | Embedded systems such as digital signal processing (DSP) systems use Harvard architecture processors extensively. Von Neumann architecture is used extensively in general purpose computing systems. |
| 7.1.1.9 View | Understand the concept of addressable memory. |
7.2 The stored program concept
7.2.1 The meaning of the stored program concept
| Reference | Content | Additional information |
|---|---|---|
| 7.2.1.1 View | Be able to describe the stored program concept: machine code instructions stored in main memory are fetched and executed serially by a processor that performs arithmetic and logical operations. |
7.3 Structure and role of the processor and its components
7.3.1 The processor and its components
| Reference | Content | Additional information |
|---|---|---|
| 7.3.1.1 View | Explain the role and operation of the arithmetic logic unit. | |
| 7.3.1.2 View | Explain the role and operation of the control unit. | |
| 7.3.1.3 View | Explain the role and operation of the clock. | |
| 7.3.1.4 View | Explain the role and operation of general-purpose registers. | |
| 7.3.1.5 View | Explain the role and operation of the program counter. | |
| 7.3.1.6 View | Explain the role and operation of the current instruction register. | |
| 7.3.1.7 View | Explain the role and operation of the memory address register. | |
| 7.3.1.8 View | Explain the role and operation of the memory buffer register. | |
| 7.3.1.9 View | Explain the role and operation of the status register. |
7.3.2 The Fetch-Execute cycle and the role of registers within it
| Reference | Content | Additional information |
|---|---|---|
| 7.3.2.1 View | Explain how the Fetch-Execute cycle is used to execute machine code programs, including the stages in the cycle (fetch, decode, execute) and details of registers used. |
7.3.3 The processor instruction set
| Reference | Content | Additional information | |||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 7.3.3.1 View | Understand the term 'processor instruction set' and know that an instruction set is processor specific. | ||||||||||||||||||
| 7.3.3.2 View | Know that instructions consist of an opcode and one or more operands (value, memory address or register). | A simple model will be used in which the addressing mode will be incorporated into the bits allocated to the opcode so the latter defines both the basic machine operation and the addressing mode. Students will not be expected to define opcode, only interpret opcodes in the given context of a question. For example, 4 bits have been allocated to the opcode (3 bits for basic machine operation, eg ADD, and 1 bit for the addressing mode). 4 bits have been allocated to the operand, making the instruction, opcode + operand, 8 bits in length. In this example, 16 different opcodes are possible (24 = 16).
| |||||||||||||||||
7.3.4 Addressing modes
| Reference | Content | Additional information |
|---|---|---|
| 7.3.4.1 View | Understand and apply immediate addressing. | Immediate addressing: the operand is the datum. |
| 7.3.4.2 View | Understand and apply direct addressing. | Direct addressing: the operand is the address of the datum. Address to be interpreted as meaning either main memory or register. |
7.3.5 Machine-code/assembly language operations
| Reference | Content | Additional information |
|---|---|---|
| 7.3.5.1 View | Understand and apply the basic machine-code operations of:
Use the basic machine-code operations above when machine-code instructions are expressed in mnemonic form—assembly language, using immediate and direct addressing. |
7.3.6 Factors affecting processor performance
| Reference | Content | Additional information |
|---|---|---|
| 7.3.6.1 View | Explain the effect on processor performance of multiple cores. | |
| 7.3.6.2 View | Explain the effect on processor performance of cache memory. | |
| 7.3.6.3 View | Explain the effect on processor performance of clock speed. | |
| 7.3.6.4 View | Explain the effect on processor performance of word length. | |
| 7.3.6.5 View | Explain the effect on processor performance of address bus width. | |
| 7.3.6.6 View | Explain the effect on processor performance of data bus width. |
7.4 External hardware devices
7.4.1 Input and output devices
| Reference | Content | Additional information |
|---|---|---|
| 7.4.1.1 View | Know the main characteristics, purpose and suitability of barcode readers and understand their principles of operation. | |
| 7.4.1.2 View | Know the main characteristics, purpose and suitability of digital cameras and understand their principles of operation. | |
| 7.4.1.3 View | Know the main characteristics, purpose and suitability of laser printers and understand their principles of operation. | |
| 7.4.1.4 View | Know the main characteristics, purpose and suitability of RFID and understand their principles of operation. |
7.4.2 Secondary storage devices
| Reference | Content | Additional information |
|---|---|---|
| 7.4.2.1 View | Explain the need for secondary storage within a computer system. | |
| 7.4.2.2 View | Know the main characteristics, purposes, suitability and understand the principles of operation of the hard disk. | |
| 7.4.2.3 View | Know the main characteristics, purposes, suitability and understand the principles of operation of the optical disk. | |
| 7.4.2.4 View | Know the main characteristics, purposes, suitability and understand the principles of operation of the solid-state disk (SSD). | SSD = NAND flash memory + a controller that manages pages, and blocks and complexities of writing. Based on floating gate transistors that trap and store charge. A block, made up of many pages, cannot overwrite pages; a page has to be erased before it can be written to but technology requires the whole block to be erased. Lower latency and faster transfer speeds than a magnetic disk drive. |
| 7.4.2.5 View | Compare the capacity and speed of access of various media and make a judgement about their suitability for different applications. |
8 Consequences of uses of computing
8.1 Individual (moral), social (ethical), legal and cultural issues and opportunities
| Reference | Content | Additional information |
|---|---|---|
| 8.1.1 View | Show awareness of current individual (moral), social (ethical), legal and cultural opportunities and risks of computing. Understand that:
Be able to discuss the challenges facing legislators in the digital age. | Teachers may wish to employ two very powerful techniques, hypotheticals and case studies, to engage students in the issues. Hypotheticals allow students to isolate quickly important ethical principles in an artificially simplified context. For example, a teacher might ask students to explain and defend how, as a Google project manager, they would evaluate a proposal to bring Google's Street View technology to a remote African village. What questions should be asked? Who should be consulted? What benefits, risks and safeguards considered? What are the trade-offs? Case studies allow students to confront the tricky interplay between the sometimes competing ethical values and principles relevant in real world settings. For example, the Google Street View case might be used to tease out the ethical conflicts between individual and cultural expectations, the principle of informed consent, Street View's value as a service, its potential impact on human perceptions and behaviours, and its commercial value to Google and its shareholders. There are many resources available on the Internet to support teaching of this topic. |
9 Fundamentals of communication and networking
9.1 Communication
9.1.1 Communication methods
| Reference | Content | Additional information |
|---|---|---|
| 9.1.1.1 View | Define serial transmission methods. | |
| 9.1.1.2 View | Define parallel transmission methods. | |
| 9.1.1.3 View | Discuss the advantages of serial over parallel transmission. | |
| 9.1.1.4 View | Define and compare synchronous and asynchronous data transmission. | |
| 9.1.1.5 View | Describe the purpose of start and stop bits in asynchronous data transmission. |
9.1.2 Communication basics
| Reference | Content | Additional information |
|---|---|---|
| 9.1.2.1 View | Define baud rate. | |
| 9.1.2.2 View | Define bit rate. | |
| 9.1.2.3 View | Define bandwidth. | |
| 9.1.2.4 View | Define latency. | |
| 9.1.2.5 View | Define protocol. | |
| 9.1.2.6 View | Differentiate between baud rate and bit rate. | Bit rate can be higher than baud rate if more than one bit is encoded in each signal change. |
| 9.1.2.7 View | Understand the relationship between bit rate and bandwidth. | Bit rate is directly proportionate to bandwidth. |
9.2 Networking
9.2.1 Network topology
| Reference | Content | Additional information |
|---|---|---|
| 9.2.1.1 View | Understand and explain the operation of a physical star topology. | |
| 9.2.1.2 View | Understand and explain the operation of a logical bus network topology. | A network physically wired in star topology can behave logically as a bus network by using a bus protocol and appropriate physical switching. |
| 9.2.1.3 View | Differentiate between the physical star topology and the logical bus network topology. |
9.2.2 Types of networking between hosts
| Reference | Content | Additional information |
|---|---|---|
| 9.2.2.1 View | Explain peer-to-peer networking and describe situations where it might be used. | In a peer-to-peer network, each computer has equal status. |
| 9.2.2.2 View | Explain client-server networking and describe situations where it might be used. | In a client-server network, most computers are nominated as clients and one or more as servers. The clients request services from the servers, which provide these services, for example file server, email server. |
9.2.3 Wireless networking
| Reference | Content | Additional information |
|---|---|---|
| 9.2.3.1 View | Explain the purpose of WiFi. | A wireless local area network that is based on international standards. Used to enable devices to connect to a network wirelessly. |
| 9.2.3.2 View | Be familiar with the components required for wireless networking. |
|
| 9.2.3.3 View | Be familiar with the purpose of Service Set Identifier (SSID). | |
| 9.2.3.4 View | Be familiar with how wireless networks are secured using WPA (Wifi Protected Access)/WPA2. | |
| 9.2.3.5 View | Be familiar with how wireless networks are secured by disabling SSID (Service Set Identifier) broadcasting. | |
| 9.2.3.6 View | Be familiar with how wireless networks are secured using a MAC (Media Access Control) address allow list. | |
| 9.2.3.7 View | Explain the wireless protocol Carrier Sense Multiple Access with Collision Avoidance (CSMA/CA) with and without Request to Send/Clear to Send (RTS/CTS). |